·所有指令均为16位宽，包括双MAC指令 ·Teak能在5个循环中处理复杂FFT，在3个循环中处理Viterbi解码程序

at a glance:

• All instructions are 16 bits wide, including dual-MAC instructions.
• Teak handles complex FFT in five cycles and Viterbi decoder in three cycles.

The fully synthesizable, low-power, 16-bit, fixed-point, dual-MAC (multiply-accumulate) unit, licensable Teak DSP soft core has an instruction-level-parallelism capability. It targets cellular terminals, digital cameras, voice-over-IP gateways and Internet-audio applications. Teak has active, slow, and idle power-management modes in addition to internal mechanisms to reduce power consumption. Teak includes a configurable memory size; a data-address-arithmetic unit; two multipliers; a 40-bit, three-input, split ALU; four 40-bit accumulators; an exponent unit; and a bit-manipulation unit. It has integrated accelerators for complex FFT; Viterbi-decoder; RTOS; and bit-exact standards, such as GSM communications. It has zero-overhead- loop mechanisms with infinite levels of repeat and block repeat, vectored interrupt, small interrupt latency, and wide-automatic-context-switching. Designers can extend Teak’s program memory to 8 Mbytes and the core by hardware accelerations via the user-definable registers. Teak is code-compatible with the OakDSPCore and TeakLite instruction sets of SmartCores.

The XpertTeak is a fully synthesizable, process-independent, licensable option of a low-power, programmable-DSP core, targeting cellular, image, video, audio, speech, and voice-over-packet applications. XpertTeak is available as a stand-alone DSP SOC (system on chip) or embedded with an ARM SOC. The embedded offering includes an AMBA bridge and an APB bridge. XpertTeak is based on the dual-MAC Teak DSP core with the addition of a high-performance DMA controller, buffered time-division-multiplexing ports, a host-processor interface, and timers. The power-management unit can reduce the power consumption of inactive peripherals.

Addressing and processing modes: Teak supports circular (modulo) buffering, register, short- and long-direct, short- and long-immediate, relative, bit-reversal, and short- and long-index-based addressing modes. It can also perform quadruple-indirect addressing (for example, to simultaneously feed four inputs of the two multipliers or four inputs of the split ALU). The XpertTeak has separate instruction- and data-memory ranges. It can access as much as 8 Mbytes of program memory and 8 Gbytes of data memory. It incorporates a synchronous SRAM interface for the memories.

Special instructions or integral-peripheral functions: Instructions include dual-MAC operation, read/write double words to and from memory, and single-cycle minimum/maximum search with pointer latching. Teak handles complex FFT butterfly in five cycles and Viterbi decoding in three cycles. It includes bit-manipulation and microcontroller instructions, double-precision multiplication, normalization, single-cycle exponent evaluation, conditional instructions, coprocessor support, division step, and infinite levels of repeat and block repeat. All the instructions are 16 bits wide, supporting compact code. Teak supports cycle stealing and burst-mode DMA, program boot, and code downloading.

XpertTeak includes an eight-channel DMA controller, two buffered time-division multiplexing ports, an 8/16-bit host port that facilitates interfacing to a variety of host processors in the stand-alone offering or AMBA and APB bridge in the embedded offering. XpertTeak also includes a power-management unit, serial I/O, a vectored interrupt-control unit, timers, PWM generators, JTAG, and an on-chip-emulation-module.