·Teakite是一种低功耗、可许可使用的芯核 ·VOPStream是针对信包传输话音应用的一种可许可使用的设计

at a glance:

• TeakLite is a low-power-consumption, licensable core.
• VoPStream is a licensable design for voice-over-packet applications.

The 16-bit, fixed-point, single-MAC (multiply-accumulate)- unit, licensable TeakLite soft DSP core is code-compatible with the OakDSPCore instruction set. It enhances the OakDSPCore in portability, frequency, power consumption, and area. It is a process- and library-independent soft core, increases operating speed by 30% in the same process technology, and reduces power consumption by architecture and power-reduction mechanisms. Its design methodology better meets ASIC-design-environment requirements by employing a single-edge design (still with four pipeline stages) and full or partial testability and by using standard memories. TeakLite has a configurable memory size, a data-address-arithmetic unit, a multiplier, an ALU, four 36-bit accumulators, a bit-manipulation unit, and zero-overhead loop mechanisms for repeat and block repeat. Its instruction set includes microcontroller instructions enabling high code density. It has user-definable registers for hardware acceleration, coprocessor support, or both; cycle-stealing DMA support; and active, slow, and ideal power-management-operation modes.

The VoPStream, previously known as VoPKey, is a licensable design for VoP (voice-over-packet) applications. The company based VoPSTream on the TeakLite DSP architecture. It targets VoDSL (voice-over-DSL), VoCable (voice-over-cable), enterprise/residual gateways, and IP-PBX (Internet protocol-private-branch exchange) and IP (LAN) phone applications. VoPStream can operate alone, or you can use it as a subsystem in an integrated-networking/VoP SOC. VoPStream includes software for speech compression and decompression, echo cancellation, and other associated telephony functions. The software is open, allowing designers to add proprietary algorithms. An evaluation board is available, based on a mass-production chip that incorporates the VoPStream design and includes a set of development tools. The DSP firmware includes speech codecs, such as G.723, G.726, G.729 and G.711, G.168 echo cancellation, VAD, CNG, DTMF fax/modem detection, caller ID, and many more algorithms.

Addressing and processing modes: TeakLite supports register, single- and double indirect, short- and long-immediate, short- and long-index, stack-pointer, and program-memory-indirect addressing modes. It supports circular (modulo) buffering for all its pointers and direct addressing for the entire 64k-word data space. VoPStream supports synchronous and asynchronous interfaces to external memories, such as DRAM and flash for data storage. VoPStream can function as a slave device using the host-port interface. It can communicate with pulse-code-modulation devices and E1/T1 standard peripherals using SPI and time-division-multiplexing interfaces.

Special instructions or integral-peripheral functions: Instructions include single-cycle minimum/maximum calculation with pointer latching, double-precision calculations, normalization, single-cycle exponent evaluation, conditional accumulator modifications, division step, read-modify (add/subtract/OR/AND/XOR)-write, test 16-bit mask bits and test bit, delayed return, interruptible single-word repeat loop and block repeat, 36-bit shift left or right in a single cycle, and a bank exchange of alternative registers. It also has support for program boot and code downloading. The VoPStream on-chip serial port permits direct interface with PCM highways or to ADCs and DACs, and the 8/16-bit host port permits interfacing to a variety of host processors, including PowerPC, ARM, and MIPS. The VoPStream includes four optional on-chip sigma-delta analog codecs.

Development support: ParthusCeva provides GUI-based development tools for all the DSP cores and platforms. These tools include an optimizing C++/C-compiler, an assembler, a linker, common-object-file-format converters, a debugger with an emulation interface and a Matlab interface, the Assyst extendable simulator for system-on-chip simulation, a profiler, and the ability for multicore debugging. ParthusCeva offers evaluation-development boards for each core for specific market segments, such as image, video and VoIP (voice-over-IP), and for integrating with RISC architectures. ParthusCeva offers various algorithms, such as speech codecs, audio, and video, as well as technical training courses and design services. ParthusCeva’s infrastructure of third-party vendors offers software algorithms, development tools, and design services.