·RSC处理器专门针对语音识别和合成 ·RSC处理器支持噪声鲁棒语音识别和高质量5kbps语音输出

at a glance:

• RSC processors are specialized for speech recognition and synthesis.
• RSC processors support noise-robust speech recognition and high-quality, 5-kbps speech output.

The RSC-3x and RSC-4x speech processors combine a microcontroller with advanced speech-processing technology targeting high-quality speech recognition, speech and music synthesis, speaker verification, and record and playback. These devices feature a high-performance microcontroller with generous on-chip RAM and ROM, and DSP blocks, such as an independent digital filter bank and a multiplier. The RSC-4x family also features a vector processor to accelerate signal processing.

The RSC-3x and RSC-4x use a neural network to perform speaker-independent speech recognition. Both achieve high-quality speech-synthesis output using time- and frequency-domain-compression techniques. The RSC-4x uses Sensory’s SX compression technology supporting speech playback data rates as low as 5 kbps. The RSC-4x features Hidden Markov Model speech recognition enabling text-to-speaker-independent generation of noise-robust recognition sets with just a few keystrokes. Designers have access to 24 I/O lines for general-purpose product control.

Addressing and processing modes: RSC devices support sequential addressing modes. Sensory has expanded the RSC-4x address space to 1 Mbyte.

Special instructions or integral-peripheral functions: The RSC-3x and RSC-4x processors include an on-chip microphone preamplifier and ADC for speech input and a DAC with optional amplification for speech output. This configuration enables a single-chip option for speech-in/speech-out dialogue applications. Enabling true continuous listening in battery applications, the RSC-4x includes an audio-wake-up feature that monitors the environment independently of the microcontroller, and an audio event triggers the chip to wake from a 50-mA sleep mode. Sensory has added new 16-bit data instructions to the RSC-4x. The RSC-4x family features twin DMA units, as many as four comparator inputs, a watchdog timer, and as many as eight nested interrupt sources for power-saving wakeup.