·C5000 DSP平台提供多于30个代码兼容装置 ·C5501和C5502为300MHz双乘－加单元DSP，功耗小于200mW，成本低于10美元

at a glance:

• The C5000 DSP platform offers more than 30 code-compatible devices.
• C5501 and C5502 are 300-MHz, dual-multiply-accumulate-unit DSPs with less than 200 mW power dissipation that cost less than $10.

The TMS320C5000 DSP platform has more than 30 code-compatible devices and includes the TMS320C54x and TMS320C55x DSP generations. These devices use a modified Harvard architecture and target portable Internet, multimedia communications, and medical and biometrics applications. The TMS320C5420 and TMS320C5421 are both dual-core devices, and the TMS320C5441 is a quad-core device targeting high-channel-density applications. The TNET3010 has six C55x DSP cores, targeting high-density voice and access class E1/T1 telecom applications. Compared with a Pentium 4, it has three times the transistor count (approximately 180 million transistors), consumes 50 times less power, is 20% smaller, and supports more than 200 voice channels.

The C55x DSPs are source-code-compatible with the C54x DSPs. The C54x focuses on low power consumption, but the C55x takes power efficiency to a new level: A 300-MHz C55x delivers a maximum fivefold improvement in performance over a 120-MHz C54x and dissipates as little as one-sixth its core power. The C55x has 12 independent buses, and the C54x has eight. Both architectures include one program bus and an associated program-address bus. The C55x bus is 32 bits wide, and the C54x bus is 16 bits wide. The C55x has three data-read buses and two data-write buses; the C54x has two data-read buses and one data-write bus. Each data bus also has its own address bus. The corresponding address buses are 24 bits wide on the C55x and 16 bits wide on the C54x.

Addressing and processing modes: The C54x supports single-data-memory-operand addressing that also supports 32-bit operands. It also supports dual-data-memory-operand addressing that parallel instructions use. It provides immediate, memory-mapped, circular, and bit-reversed addressing. In addition to the C54x modes, the C55x supports absolute addressing, register-indirect-addressing, direct-addressing, and displacement mode. The C55x includes dedicated registers to support circular addressing for instructions that use indirect addressing. Programs can simultaneously use as many as five independent circular-buffer locations with as many as three independent buffer lengths. These circular buffers have no address-alignment constraints. The C54x supports two circular buffers of arbitrary lengths and locations.

Special instructions or integral-peripheral functions: The C54x performs dedicated-function instructions, such as FIR filters, single and block repeat, eight parallel instructions, multiply, accumulate, and subtract (10 multiply instructions), and eight dual-operand memory moves. The C55x also has special instructions that take advantage of the additional functional units and increase parallelism capabilities. User-defined parallelism allows you to combine instructions to perform two operations. You can also combine a built-in parallel instruction with a user-defined parallel instruction. The C5509includes peripherals like a USB interface and multimedia-memory-card port.